ARMulator - ARM to x86-64 JIT Translation Layer

A JIT-compiled ARM instruction set emulator that translates ARM instructions to x86-64 machine code at runtime using Cranelift.

Architecture

The project is organized into several key components:

Decoder (src/decoder/)

• instruction.rs: Defines ARM instruction structures and condition codes
• arm_decoder.rs: Decodes ARM instruction encodings into structured Instruction objects
• Supports ARM data processing, branch, load/store, multiply, and software interrupt instructions

Runtime (src/runtime/)

• registers.rs: ARM register file (R0-R15) and CPSR (status register)
• memory.rs: Memory management with read/write operations and memory protection regions
• runtime.rs: Runtime context combining registers and memory, with condition code evaluation

Translator (src/translator/)

• translator.rs: Coordinates translation of ARM instruction blocks to Cranelift IR
• x86_builder.rs: Builds Cranelift IR for x86-64 target, translating ARM operations:
  • Data processing (ADD, SUB, AND, ORR, etc.)
  • Branches
  • Load/Store operations
  • Multiply instructions

JIT Compiler (src/jit/)

• jit_compiler.rs: Compiles Cranelift IR functions to x86-64 machine code
• Uses Cranelift's native backend for code generation

Executor (src/executor/)

• executor.rs: Main execution engine that:
  • Decodes ARM instruction blocks
  • Translates blocks to IR
  • JIT compiles to machine code
  • Caches compiled blocks
  • Executes ARM code

How It Works

1. Decode: ARM instructions are decoded from binary format
2. Translate: Instructions are translated to Cranelift IR (intermediate representation)
3. Compile: IR is compiled to x86-64 machine code using Cranelift
4. Execute: Compiled code runs natively on x86-64 hardware
5. Cache: Compiled blocks are cached for reuse

Building

cargo build --release

Usage

use armulator::executor::Executor;

let mut executor = Executor::new()?;
executor.load_code(0x1000, &arm_code_bytes)?;
executor.set_entry_point(0x1000);
executor.run()?;

Current Status

This is a foundational implementation. Key features implemented:

• ✅ ARM instruction decoding
• ✅ Basic translation to Cranelift IR
• ✅ Runtime environment (registers, memory)
• ✅ Execution engine framework

Areas for enhancement:

• Full ARM instruction set coverage
• Proper register mapping and optimization
• Memory protection and MMU emulation
• System call handling
• Thumb mode support
• Floating point operations
• Actual JIT code execution (currently uses stub functions)

Dependencies

• cranelift-codegen: Code generation backend
• cranelift-frontend: IR building utilities
• cranelift-native: Native target ISA support
• anyhow: Error handling